Senior Physical Design Engineer
 Microsoft | |
 United States, North Carolina, Raleigh | |
 Sep 21, 2025 | |
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OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Microsoft's Compute Silicon & Manufacturing Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior Physical Design Engineer to join the team.
ResponsibilitiesLead and manage floorplanning and design planning activities to optimize timing-critical and large sub-chips for power, performance, and area (PPA). Drive end-to-end execution from synthesis through place-and-route for large sub-chips and/or full-chip designs, ensuring completion of all signoff stages including timing, physical verification, EMIR, formal equivalence, and low-power verification. Coordinate effectively across cross-functional teams such as DFT, RTL/Design/IP, STA, CAD, Architecture, Power & Performance, and both internal and external stakeholders. Influence design tools, flows, and methodologies in construction, signoff, and optimization through a data-driven approach. Develop and implement robust clock distribution strategies that meet design specifications. Make sound technical trade-offs between power, area, and timing to achieve optimal design outcomes. Provide technical leadership and foster collaboration across teams to deliver the best possible solutions, aligned with a One Microsoft mindset. | |