Senior PIC Design Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

In this role, you will be a key part of the team responsible for the design and layout of very large-scale Silicon Photonic ICs (PICs) that interface directly with co-designed ASICs from advanced technology nodes at TSMC.

ESSENTIAL DUTIES AND RESPONSIBILITIES

• Contribute to the design and layout of very large-scale Silicon Photonic ICs (PICs) that interface directly with co-designed ASICs.
• Contribute to PIC delivery, all the way from floor-planning and top-level block placement to micro-architecture, optical & electrical routing, and back-end DRC and LVS verification.
• Work in conjunction with broader analog, digital and packaging teams to drive PIC physical design in accordance with product requirements related to opto-electronic performance, signal integrity (SI) & power integrity (PI).
• Work closely with the rest of the Photonics team to optimize layout flows and add to existing software base for automated design and verification.

What We're Looking For

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and at least 1-3 years of related professional experience OR Master's degree / PhD in Computer Science, Electrical Engineering or related fields with no professional experience.
• PhD in engineering or physics with concentration/experience in integrated photonics preferred.
• Good grasp of fundamental photonics concepts and engineering design principles
• Experience with Silicon Photonics Process Design Kits and related best practices in the layout of photonic devices, sub-systems and full PICs.
• Experience with physical design packages (Cadence, Siemens Mentor, Klayout or similar), including layout automation within these tools using SKILL, Python or similar.
• Experience with layout verification tools for DRC, ERC and LVS (Calibre, Pegasus or similar).
• Familiarity with SI and PI-aware electrical routing for analog and digital blocks is a strong plus.

• Self-starter
• Creativity in problem-solving with strong attention to detail
• Thrives in a highly collaborative and dynamic work environment
• Excellent oral and written communication skills

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.