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Core Engineering - Design Engineer V

Spectraforce Technologies
500 West Peace Street (Show on map)
May 15, 2026
PCB Layout Engineer, AR Product Team
As a PCB Layout Engineer on Metas AR Product Team, you will be responsible for driving worldclass, complex PCB layouts that incorporate cuttingedge component and stackup technologies. A core focus of this role is implementing miniaturization solutions within AR product designs. You will collaborate closely with internal electrical and mechanical engineers, DFM, SiPi, and other layout and library teams, as well as external suppliers.
RESPONSIBILITIES
Project Management Execution:
Manage multiple complex layout projects, providing timely status reports within Meta systems.
Lead designs from kickoff through tapeout, encompassing rigid, rigidflex, and flex PCBs for both product and nonproducttest projects.
Proactively schedule and drive project meetings Kickoff, Placement, Constraint, and Design Reviews to ensure design verification using Metas Design Traveler document.
Create and modify engineering tool project templates, metadata, configuration data, and rules.
Technical Expertise Problem Solving:
Apply a solid understanding of electrical engineering principles, particularly for power distribution, highspeed circuits, and RF signals.
Identify project execution risks or slowdowns proactively and collaborate with managers andor technical program managers to propose alternative PCB development workflow solutions.
Understand and propose practical fit and function solutions related to miniaturization concepts.
CrossFunctional Collaboration Supplier Engagement:
Proactively partner with EE Leads, Mechanical Engineering, TPMs, and other crossfunctional teams XFNs to resolve design issues.
Work with internal DFM engineers to confirm supplier requirements at project launch.
Engage with external suppliers and Supplier QualityProcess Engineering SQEPE to resolve DFM issues and ensure highyield builds.
MINIMUM QUALIFICATIONS
8 years of experience in complex PCB Design.
5 years of experience using Allegro PCB Design Tools version 23.1 or newer.
Strong understanding of the mechanical aspects of electronics design.
Excellent communication skills.
Proficiency with Microsoft Office tools.
PREFERRED QUALIFICATIONS
BS in Electrical Engineering.
3 years of experience implementing miniaturization solutions in dense formfactor designs e.g., wearable products, mobile phone design.
Pursuant to the California Fair Chance Act, Los Angeles County Fair Chance Ordinance for Employers, Los Angeles Fair Chance Initiative for Hiring Ordinance, and San Francisco Fair Chance Ordinance, qualified applicants will be considered for assignment with arrest and conviction records. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness, meet client expectations, standards, and accompanying requirements, and safeguard business operations and company reputation.
Release Comments:
Please use the below link to begin submitting Candidates.
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