Director Silicon Design Engineering

The Role

As ASICDirector- Chip Leadinour ProductDevelopment team, you willbe responsible forprovidingtechnical leadershipto one or moreAdaptive & Embedded Computing Group (AECG)device programs. You willhave sign-offresponsibilityforthe technicalexecution ofdevice programsfromconception&planningtorelease to manufacturing.Your leadership responsibilities willfocus onproblem solving in all aspects of thedevice developmentcycleincludingarchitecture,RTL,analog& customdesign,design fortest&manufacturing,verification, physical design& timing closure, physical verification,tapeoutand post-silicon validation& qualification.When a problem does not clearly fall under the banner of one technical team oranotherit becomes the responsibility of the Chip Lead to bringexpertise,experienceand diplomacytogetherto coordinatea solution.

The Person

This position requires a wide breadth ofunderstandingofand experiencewithASIC design and development.It also requires strong interpersonal skills to resolve issues between highly skilled and experienced engineering colleagues.A successful candidate will workwith senior silicon design engineers, architects, and micro-architectsfroma wide variety of technical teams. The candidate will beattuned to the overall goals andobjectivesof theprogram andemploy excellentcommunication and problem-solving skills.

Qualifications

• 15+ years of experiencerequiredin ASIC Development Lifecycle.
  FPGA technical experience is a huge plus

• 5+ years of experience in a leadership rolewitha semiconductor company

• Master's or PhD in Electrical Engineering,Computer Engineering, or related technical field

• Post-silicon validation experience is a strong asset

• Strong understanding of semiconductor industry and products. Experience working with Product Planning and Marketing teams is preferred.

KeyResponsibilities

Chip Definition and Feasibility

• Chip Definition and Feasibility -identifycritical tradeoffs and architectural decisions

• Advise on Feasibility including early estimates of Schedule, Cost, Size, Power, Floorplan,
  andidentifykey implementation decisions

• Serve asEngineering's interface to Technical Marketing; ensuring the product meets customer needs and supports the required functions and usage modes

• Define/identifynewdevicespecificfunctionality (with Marketing and Architecture)

• When needed,negotiatefora new,newversionornewvariantof an IP(with the IP/COE Lead)

• Be aware of devices and programs throughout theorganization; fosterengineering re-use

• Help resolve issues and guide trade-offs that ariseduring any phase of the program but especiallyin Physical Design.

Execution

• The Chip Lead works with one or more Program Managers:
  The Program Manager tracksthatIPand chip developmentmilestonesanddeliverablesare achievedas scheduled.The Chip Leadengagesandresolves the problemwhen some aspect of the program is notmeetingitsplannedobjectives.

• When engineering or marketinginitiatesa change to the program, the Chip Lead communicatesthe change and its consequencestoallstakeholders.

#LI-G11

#LI-HYBRID